WMSIC Electronic Components

cjiang FNR4018S470MT

ModelFNR4018S470MT
PackageSMD
Brandcjiang
Price Price on request Electronic component prices change quickly with market supply and demand. Please refer to the latest WMSIC quotation for current pricing.
Configuration
1 options
Configuration 25+

Available for RFQ

Technical data

Product details

19 specifications

Core information

Product name
cjiang FNR4018S470MT
Type
CJIANG
Minimum package
3000 圆盘

Technical parameters

Electronic Component
Electronic Component
Electronic Component
CJIANG
Electronic Component
FNR4018S470MT
Electronic Component
1
Package
SMD
Type
Magnetic Display Inductor
Electronic Component
Power Inductor
Electronic Component
±20%
Electronic Component
0.216g
Inductor
47uH
Electronic Component
1
Electronic Component
BM0264532921
Current
650mA
Resistor(DCR)
845mΩ
Electronic Component
Electronic Component
Electronic Component
3000

For datasheets, package documents, compatible-part guidance, or other technical resources, contact WMSIC customer service. Availability is confirmed case by case.

FNR4018S470MT 产品概述

一、产品简介

FNR4018S470MT 是长江微电(cjiang)推出的一款 SMD 功率电感,封装规格为 4×4 mm。该器件为磁胶屏蔽电感,额定电流 650 mA,饱和电流(Isat)700 mA,标称电感值 47 μH,允许偏差 ±20%,直流电阻(DCR)约 845 mΩ。产品适用于空间受限且对电磁兼容有一定要求的电源滤波和储能场合。

二、主要参数

  • 电感值:47 μH ±20%
  • 额定电流:650 mA
  • 饱和电流(Isat):700 mA
  • 直流电阻(DCR):845 mΩ
  • 类型:磁胶屏蔽电感(屏蔽型)
  • 封装:SMD,外形约 4×4 mm

三、核心特性

  • 磁胶屏蔽结构有效抑制外磁场泄漏,减小对周围敏感电路的干扰。
  • 较高的电感量(47 μH)适合中低频滤波与能量储存。
  • DCR 较高意味着在大电流下会有较明显的 I^2R 损耗,设计时应考虑功耗与温升。
  • 紧凑 4×4 mm 封装,便于高密度 PCB 布局。

四、典型应用

  • DC-DC 降压/升压转换器的输出滤波或储能电感
  • 电源输入滤波器(PMIC 边)
  • LED 驱动与便携式设备电源管理
  • 对电磁泄露有要求的小型化电源模块

五、封装与焊接建议

  • 建议按制造商推荐的焊盘布局设计 PCB,确保焊盘足够的焊锡覆盖以降低接触电阻。
  • 回流焊温度曲线按通用无铅回流规范执行,避免过长高温暴露以保护胶体结构。
  • 对高频去耦与低频储能场合,注意旁路电容与电感的合理配合,避免振铃与过度耦合。

六、可靠性与注意事项

  • 建议工作电流优先控制在额定电流以下,尽量远离饱和电流区间以保持稳定电感值。
  • 由于 DCR 接近欧姆级别,长期大电流会产生热量,要求在散热与布局上预留裕量。
  • 在有强磁场环境下仍应验证实际性能,虽然为屏蔽结构但并非完全免疫。

七、订购信息与技术支持

目标型号:FNR4018S470MT,品牌:cjiang(长江微电),封装 SMD 4×4 mm。详尽的电气特性、回流焊工艺、建议焊盘及可靠性数据可向供应商索取器件数据手册(Datasheet)与测试报告,以便在具体设计中进行验证与优化。

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